Foist, R. B., & Xu, X., & Gage, T., & Truitt, S., & Schmidt, M. H. (2018, July), Full Paper: A First-Year Computer Engineering Lab Project—Driving an LCD with an FPGA Embedded Processor  Paper presented at 2018 FYEE Conference, Glassboro, New Jersey. 10.18260/1-2--31404

\bibitem{asee_peer_31404}
  Foist, R. B., \& Xu, X., \& Gage, T., \& Truitt, S., \& Schmidt, M. H. (2018, July), \emph{Full Paper: A First-Year Computer Engineering Lab Project—Driving an LCD with an FPGA Embedded Processor}
  Paper presented at 2018 FYEE Conference, Glassboro, New Jersey.
  10.18260/1-2--31404

Rod B. Foist, Xuping Xu, Timothy Gage, Seth Truitt, and Matthias Hans Schmidt.  "Full Paper: A First-Year Computer Engineering Lab Project—Driving an LCD with an FPGA Embedded Processor".  2018 FYEE Conference, Glassboro, New Jersey, 2018, July.  ASEE Conferences, 2018.  https://strategy.asee.org/31404 Internet.  14 May, 2024

\bibitem{asee_peer_31404}
  Rod B. Foist, Xuping Xu, Timothy Gage, Seth Truitt, and Matthias Hans Schmidt.
  "Full Paper: A First-Year Computer Engineering Lab Project—Driving an LCD with an FPGA Embedded Processor".
  \emph{2018 FYEE Conference, Glassboro, New Jersey, 2018, July}.
  ASEE Conferences, 2018.
  https://strategy.asee.org/31404 Internet.  14 May, 2024

@INPROCEEDINGS{asee_peer_31404
author = "Rod B. Foist, Xuping Xu, Timothy Gage, Seth Truitt, and Matthias Hans Schmidt"
title = "Full Paper: A First-Year Computer Engineering Lab Project—Driving an LCD with an FPGA Embedded Processor"
booktitle = "2018 FYEE Conference"
year = "2018"
month = "July"
address = "Glassboro, New Jersey"
publisher = "ASEE Conferences"
note = {https://strategy.asee.org/31404}
number = {10.18260/1-2--31404}
}

TY  - CPAPER
AB  - Recent National Science Foundation (NSF) research, aimed at improving the Electrical and Computer Engineering (ECE) curriculum across all four years, makes strategic use of laboratory projects.  The “spiral model”, adapted from other research, introduces certain lab component themes (in the freshman year) and revisits them with increased sophistication and interconnection in the following years.  Thus, labs are used as a “cohesive framework” that connects and integrates individual courses.  The three themes used in this research are centered on video (and image), sound, and touch sensors.  In this paper, and a companion paper, we present our own design of two new lab projects (within the video/image theme).  Specifically, this paper reports on the use of a Field-Programmable Gate Array (FPGA)-based embedded processor to control a liquid crystal display (LCD).  This approach is contrasted with using a state-machine for LCD control.  The companion paper presents the design of a microcontroller-based voltmeter with measured voltage values shown on an LCD.  The contribution of this paper is to provide a fully-working, easy-to-use, first-year lab project within the video/image theme of the spiral model approach to improving the ECE curriculum.  The project design code will be made available for downloading on the internet, via the Bitbucket web-hosting service.
AU  - Rod B. Foist
AU  - Xuping Xu
AU  - Timothy Gage
AU  - Seth Truitt
AU  - Matthias Hans Schmidt
CY  - Glassboro, New Jersey
DA  - 2018/07/24
PB  - ASEE Conferences
TI  - Full Paper: A First-Year Computer Engineering Lab Project—Driving an LCD with an FPGA Embedded Processor
UR  - https://strategy.asee.org/31404
DO  - 10.18260/1-2--31404
ER  -