Asee peer logo

Design and Implementation of a SEPIC Topology DC-DC Converter

Download Paper |

Conference

2023 ASEE North Central Section Conference

Location

Morgantown, West Virginia

Publication Date

March 24, 2023

Start Date

March 24, 2023

End Date

March 25, 2023

Page Count

13

DOI

10.18260/1-2--44923

Permanent URL

https://strategy.asee.org/44923

Download Count

172

Paper Authors

biography

Austin Maverick La Mothe School of Engineering, Eastern Michigan University

visit author page

I am the son of an incredibly skilled electrician and I am pursuing a degree in Electrical and Computer Engineering; while I greatly respect and understand the need for theory in the realm of electronics and electrical engineering, I also know creating something for practical use requires a level of simplicity to avoid too many possible points for failure. My long term goals are to obtain a Ph.D. in Electrical Engineering and create devices capable of supporting the ever-expanding electrical grid.

visit author page

biography

Qin Hu Eastern Michigan University Orcid 16x16 orcid.org/0000-0003-0223-8285

visit author page

Qin Hu received her B.S. and M.S. degrees in Electrical Engineering from the University of Electronic Science and Technology of China, Chengdu, China, and the Ph.D. degree in Electrical Engineering from Old Dominion University, Norfolk, VA. She is current

visit author page

Download Paper |

Abstract

Simplicity in any circuit design is important including DC-DC converter designs. Textbooks used to teach students about DC-DC converters are seldom the entire circuit from start to finish, instead relying on abstract concepts to simplify the circuit as much as possible.

This paper introduces a buck DC-DC converter design -using a SEPIC topology- and prototype based on using the well-known 555 timer to generate a PWM signal and an op-amp used as a simple two pole voltage controller.

This study will examine similar non isolated DC-DC converter topologies capable of buck conversion and how their implementation becomes more difficult and complex as the location of the switching MOSFET is moved from low-to-high side control.

The results of the analysis revealed SEPIC based converters are the easiest non isolated DC-DC converter topology with a non inverting output to use as a buck converter implemented using common components such as 555 timers, op amps, inductors, capacitors, resistors, diodes, a reference IC, and a mosfet while also achieving an acceptable quiescent current and efficiency.

La Mothe, A. M., & Hu, Q. (2023, March), Design and Implementation of a SEPIC Topology DC-DC Converter Paper presented at 2023 ASEE North Central Section Conference, Morgantown, West Virginia. 10.18260/1-2--44923

ASEE holds the copyright on this document. It may be read by the public free of charge. Authors may archive their work on personal websites or in institutional repositories with the following citation: © 2023 American Society for Engineering Education. Other scholars may excerpt or quote from these materials with the same citation. When excerpting or quoting from Conference Proceedings, authors should, in addition to noting the ASEE copyright, list all the original authors and their institutions and name the host city of the conference. - Last updated April 1, 2015