Fritz, D. J., & Mulia, W., & Sohoni, S., & Kearney, K. S., & Mwavita, M. (2011, June), The Progressive Learning Platform for Computer Engineering  Paper presented at 2011 ASEE Annual Conference & Exposition, Vancouver, BC. 10.18260/1-2--18550

\bibitem{asee_peer_18550}
  Fritz, D. J., \& Mulia, W., \& Sohoni, S., \& Kearney, K. S., \& Mwavita, M. (2011, June), \emph{The Progressive Learning Platform for Computer Engineering}
  Paper presented at 2011 ASEE Annual Conference \& Exposition, Vancouver, BC.
  10.18260/1-2--18550

David Jakob Fritz, Wira Mulia, Sohum Sohoni, Kerri S. Kearney, and Mwarumba Mwavita.  "The Progressive Learning Platform for Computer Engineering".  2011 ASEE Annual Conference & Exposition, Vancouver, BC, 2011, June.  ASEE Conferences, 2011.  https://strategy.asee.org/18550 Internet.  03 Jul, 2024

\bibitem{asee_peer_18550}
  David Jakob Fritz, Wira Mulia, Sohum Sohoni, Kerri S. Kearney, and Mwarumba Mwavita.
  "The Progressive Learning Platform for Computer Engineering".
  \emph{2011 ASEE Annual Conference \& Exposition, Vancouver, BC, 2011, June}.
  ASEE Conferences, 2011.
  https://strategy.asee.org/18550 Internet.  03 Jul, 2024

@INPROCEEDINGS{asee_peer_18550
author = "David Jakob Fritz, Wira Mulia, Sohum Sohoni, Kerri S. Kearney, and Mwarumba Mwavita"
title = "The Progressive Learning Platform for Computer Engineering"
booktitle = "2011 ASEE Annual Conference \& Exposition"
year = "2011"
month = "June"
address = "Vancouver, BC"
publisher = "ASEE Conferences"
note = {https://strategy.asee.org/18550}
number = {10.18260/1-2--18550}
}

TY  - CPAPER
AB  -                           The Progressive Learning PlatformThis paper describes the Progressive Learning Platform (PLP), a system designed for use in anumber of courses to facilitate computer engineering education while decreasing the overheadand learning curve associated with existing solutions. The PLP system is a System on a Chipdesign with accompanying tools reflecting a contemporary CPU architecture. It is unique in thatit can be used in a number of courses (Digital Logic Design, Microcomputer Principles,Computer Architecture, Compilers, Embedded Systems), as students progress through aComputer Engineering curriculum. The system consists of a fully pipelined, MIPS like processorwith surrounding support hardware. The support hardware includes a programmable interruptcontroller, VGA controller and framebuffer, UART, memory controller, simple cache, timer, andGPIO hardware. All components are written in Verilog HDL, are open-source, and are freelyavailable. To support the hardware components, a unified assembler, cycle accurate emulator,and board interface software package is included. The software is written in Java, works onLinux, Windows, and Mac OS, is open-source, and is freely available.With only a brief learning curve on the PLP system, students can work on course objectivesimmediately. The system and accompanying curriculum emphasize inter- and intra-teamcollaborative learning by compartmentalizing components of the design process used in lab toindividual teams. The goal is to expose students to a less controlled environment representativeof real-world design practice. Student teams are responsible for the design decisions of theirassigned component, as well as ensuring that components are compatible for use in the larger,class-wide system. Other highlights of the PLP system are: a ‘hands-on’ experience with realhardware early in the computer engineering curriculum, low overall cost for students andinstitutions over the years, and cross-course application of concepts. The latter is of greatimportance, since students often fail to see how concepts learned in one course apply to another.With an overarching system like PLP, where different aspects of it are taught and operated on indifferent courses, student can directly make these connections and see how concepts incomputing are related to each other.In this paper we present a case study of the PLP system in use in an undergraduate ComputerArchitecture course at a land-grant university in the Midwest. We also provide the rationalebehind the development of each aspect of PLP, and the expected impact on student learning,motivation, and retention.
AU  - David Jakob Fritz
AU  - Wira Mulia
AU  - Sohum Sohoni
AU  - Kerri S. Kearney
AU  - Mwarumba Mwavita
CY  - Vancouver, BC
DA  - 2011/06/26
PB  - ASEE Conferences
TI  - The Progressive Learning Platform for Computer Engineering
UR  - https://strategy.asee.org/18550
DO  - 10.18260/1-2--18550
ER  -