ASEE PEER - Board 91: Work in Progress: An Interdisciplinary Subject on Hardware Accelerated Computing
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Board 91: Work in Progress: An Interdisciplinary Subject on Hardware Accelerated Computing

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Conference

2024 ASEE Annual Conference & Exposition

Location

Portland, Oregon

Publication Date

June 23, 2024

Start Date

June 23, 2024

End Date

July 12, 2024

Conference Session

Electrical and Computer Engineering Division (ECE) Poster Session

Tagged Division

Electrical and Computer Engineering Division (ECE)

Permanent URL

https://strategy.asee.org/48392

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Paper Authors

biography

Glenn J Bradford University of Melbourne

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Glenn J. Bradford is a wireless engineering professional with experience in industry and education. From 2020 to 2023 he was a Teaching Fellow in the Department of Electrical and Electronic Engineering at the University of Melbourne, Australia, where he worked to create innovative curriculum incorporating practical, hands-on experiences to better drive student learning. He worked previously as a wireless systems engineer at both Intel Corp. and Motorola Solutions, Inc. Glenn received his Ph.D. in electrical engineering from the University of Notre Dame in 2014.

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Gavin Buskes The University of Melbourne Orcid 16x16 orcid.org/0000-0002-7920-8052

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Gavin is a Professor and Deputy Head (Academic) in the Department of Electrical and Electrical Engineering at the University of Melbourne, Australia. He teaches a wide range of engineering subjects and has research interests in optimal control, idea generation, prior knowledge and developing professional skills. He also holds the role of Assistant Dean (Teaching and Learning) in the Faculty of Engineering and Information Technology.

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Paul N Beuchat The University of Melbourne

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Paul is currently a Teaching Fellow at the Department of Electrical and Electronic Engineering at the University of Melbourne. He completed his doctoral degree at ETH Zurich, Switzerland, in 2019 under the supervision of Prof. John Lygeros at the Automatic Control Laboratory. The topic of his dissertation is theoretical guarantees and practical algorithms for Approximate Dynamic Programming. He received the B.Eng. degree in mechanical engineering and B.Sc. in physics from the University of Melbourne, Australia, in 2008, and the M.Sc. degree in robotics, systems and control from ETH Zurich in 2014. Paul's automation research interests are control and optimization of large-scale and robotic systems with applications in the areas of building control and coordinated robotics. Paul's engineering education research and teaching focuses on devising new and adapting existing project-based learning pedagogies for educating the next generation of engineers.

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Abstract

In this paper we report on the initial design and delivery of a hardware accelerated computing subject targeted at an interdisciplinary cohort of engineering and computing students. Within the subject, students explore different approaches to accelerating computationally intensive algorithms through customized hardware, with a particular emphasis placed on the use of FPGAs and high-level synthesis (HLS) tools. The subject aims necessitate covering aspects from a diverse range of topics, including fundamentals of digital design, computer architecture, parallel programming, and systems thinking. Although such concepts naturally intersect within the discipline of computer engineering, structural considerations within our master’s programs and disparate prior knowledge within our cohort entail students inherently experience the subject as interdisciplinary in nature. This presents numerous challenges in subject design but offers an opportunity for developing interdisciplinary competencies and an appreciation for other disciplinary ways of thinking. Based on instructor observations while teaching, we reflect on the successes and shortcomings in the subject’s design that impact interdisciplinary knowledge development. We then conclude with proposed revisions to address identified shortcomings.

Bradford, G. J., & Buskes, G., & Beuchat, P. N. (2024, June), Board 91: Work in Progress: An Interdisciplinary Subject on Hardware Accelerated Computing Paper presented at 2024 ASEE Annual Conference & Exposition, Portland, Oregon. https://strategy.asee.org/48392

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