Board 94: Work in Progress: Development of Lab-Based Assessment Tools to Gauge Undergraduates’ Circuit Debugging Skills and Performance

Andrew J. Ash; Jennifer Dawn Cribbs; John Hu

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Conference: 2024 ASEE Annual Conference & Exposition
Location: Portland, Oregon
Publication Date: June 23, 2024
Start Date: June 23, 2024
End Date: July 12, 2024
Conference Session: Electrical and Computer Engineering Division (ECE) Poster Session
Tagged Division: Electrical and Computer Engineering Division (ECE)
Permanent URL: https://peer.asee.org/48395

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Paper Authors

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Andrew J. Ash Oklahoma State University orcid.org/0000-0003-0705-3925

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Andrew J. Ash is a PhD student in Electrical Engineering in the school of Electrical and Computer Engineering at OSU and he is a research assistant in Dr. John Hu's Analog VLSI Laboratory. He received his B.S. in Electrical Engineering from Oklahoma Christian University. Andrew's research interests include hardware security of data converters and engineering curriculum development.

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Jennifer Dawn Cribbs Oklahoma State University

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Jennifer Cribbs, is a Professor in the School of Teaching, Learning and Educational Sciences at Oklahoma State University. She is also the Director for the Center for Research on STEM Teaching and Learning (CRSTL). Dr. Cribbs earned a B.S. in Chemical Engineering at Florida Institute of Technology, a MAT in Mathematics Education at Converse College, and a Ph.D. in Curriculum and Instruction with a focus on Mathematics Education at Clemson University. Her research focus is on mathematics identity and student persistence in STEM. She also explores teachers’ beliefs and practices and their connection to student affect.

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John Hu Oklahoma State University orcid.org/0000-0002-6174-8392

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John Hu received his B.S. in Electronics and Information Engineering from Beihang University, Beijing, China, in 2006 and his M.S. and Ph.D. in electrical and computer engineering from the Ohio State University, Columbus, OH, in 2007 and 2010, respectively. He worked as an analog IC designer at Texas Instruments, Dallas, between 2011 and 2012. He was a Member of Technical Staff, IC Design at Maxim Integrated, San Diego, CA, between 2012 and 2016, and a Staff Engineer at Qualcomm, Tempe, AZ, between 2016 and 2019. In 2019, he joined the School of Electrical and Computer Engineering at Oklahoma State University, where he is currently an assistant professor and Jack H. Graham Endowed Fellow of Engineering. His research interests include power management IC design, hardware security, and energy-efficient computing.

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Abstract

We will submit a work-in-progress (WIP) paper on developing laboratory-based assessment tools to gauge current undergraduates’ circuit debugging skills.

Debugging is an essential skill in today’s integrated circuit (IC) design and new product development. However, such an important skill is rarely taught explicitly in college. To design a circuit debugging training intervention, a reliable instrument to assess students’ circuit debugging performance and knowledge gain is essential. However, such a domain-specific instrument is not yet available.

This paper presents an ongoing effort to design and validate laboratory-based assessment tools to gauge undergraduates’ circuit debugging skills and performance. The research will take place in the lab sessions of a third-year undergraduate course, Fundamentals of Microelectronics, in an Electrical and Computer Engineering (ECE) department of a land-grant university. The debugging skills will be defined as the ability to (1) identify the root cause for any unexpected circuit behavior and (2) take corrective actions to restore the circuit to the desired state.

Anticipated results include a list of unannounced lab tests that can be given to students at different stages of the class. The lab tests may consist of several purposefully crafted faulty circuits on breadboards and PCBs (printed circuit boards). We propose to collect quantifiable information as the rubric: (1) Time to debug the faulty circuit, (2) Debugged circuits’ performance parameters, such as gain, power consumption, and voltage swing. We will also propose the proper interpretations of the exam scores.

Since we are designing a new, custom, domain-specific evaluation instrument, we will take extra steps to ensure the reliability and validity of the content. We will follow the American Psychological Association (APA)’s standard on Educational and Psychological Testing. Both the lab tests and the proposed interpretation will be vetted by an industry advisory board, which consists of IC product, test, and design engineers currently working in the semiconductor industry.

This submission addresses the topics of laboratory skills assessment and curriculum development innovation, as well as workforce development and industry-university cooperation.

Citation
Format

Ash, A. J., & Cribbs, J. D., & Hu, J. (2024, June), Board 94: Work in Progress: Development of Lab-Based Assessment Tools to Gauge Undergraduates’ Circuit Debugging Skills and Performance Paper presented at 2024 ASEE Annual Conference & Exposition, Portland, Oregon. https://peer.asee.org/48395

TY - CPAPER
AB - We will submit a work-in-progress (WIP) paper on developing laboratory-based assessment tools to gauge current undergraduates’ circuit debugging skills.

Debugging is an essential skill in today’s integrated circuit (IC) design and new product development. However, such an important skill is rarely taught explicitly in college. To design a circuit debugging training intervention, a reliable instrument to assess students’ circuit debugging performance and knowledge gain is essential. However, such a domain-specific instrument is not yet available.

This paper presents an ongoing effort to design and validate laboratory-based assessment tools to gauge undergraduates’ circuit debugging skills and performance. The research will take place in the lab sessions of a third-year undergraduate course, Fundamentals of Microelectronics, in an Electrical and Computer Engineering (ECE) department of a land-grant university. The debugging skills will be defined as the ability to (1) identify the root cause for any unexpected circuit behavior and (2) take corrective actions to restore the circuit to the desired state.

Anticipated results include a list of unannounced lab tests that can be given to students at different stages of the class. The lab tests may consist of several purposefully crafted faulty circuits on breadboards and PCBs (printed circuit boards). We propose to collect quantifiable information as the rubric: (1) Time to debug the faulty circuit, (2) Debugged circuits’ performance parameters, such as gain, power consumption, and voltage swing. We will also propose the proper interpretations of the exam scores.

Since we are designing a new, custom, domain-specific evaluation instrument, we will take extra steps to ensure the reliability and validity of the content. We will follow the American Psychological Association (APA)’s standard on Educational and Psychological Testing. Both the lab tests and the proposed interpretation will be vetted by an industry advisory board, which consists of IC product, test, and design engineers currently working in the semiconductor industry.

This submission addresses the topics of laboratory skills assessment and curriculum development innovation, as well as workforce development and industry-university cooperation.

AU - Andrew J. Ash
AU - Jennifer Dawn Cribbs
AU - John Hu
CY - Portland, Oregon
DA - 2024/06/23
PB - ASEE Conferences
TI - Board 94: Work in Progress: Development of Lab-Based Assessment Tools to Gauge Undergraduates’ Circuit Debugging Skills and Performance
UR - https://peer.asee.org/48395
ER -